Grrr: Cache flushing...

David S. Miller (davem@caip.rutgers.edu)
Sun, 2 Jul 1995 01:10:42 -0400


Date: Sun, 2 Jul 1995 15:03:39 +1000 (EST)
From: Andrew Cagney <cagney@highland.com.au>

o cache lines (blocks) are 2^5 bytes
o there are 2^7 sets
o there are 2(603), 4(604,603+?), 8(601) blocks per set
o virtually indexed (from the above, PPC bits 20-26)
o physically taged

Working this through you find that a block (for all sets) covers exactly
one 4k page ( == PPC page size) and as a consequence, this means that
for the PowerPC, the above is a none issue (and very nice change at that
:-).

Nice, looks like they definately put some decent forethought into
this. Hopefully, my setup will allow different ports to optimize away
unnecessary operations. Doing the shared mappings correctly may be a
pain still (this is in general) due to the fact that the linux shared
mapping code has no concept of "is this a good place to map this
area?" in respect to aliasing and such. Mainly because this is a
non-issue on the ix86/alpha. If I'm not feeling so adventurous I'll
hold off on the shared stuff until somebody really needs it (I'll
probably be the first if and when I start playing around with shared
libraries).

Later,
David S. Miller
davem@caip.rutgers.edu