Re: [v2 PATCH] arm64: dts: stratix10: add new compatible for Intel SoCFPGA Stratix10 platform

[Krzysztof Kozlowski]

On 21/07/2023 11:05, Li, Meng wrote:
> 
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>> Sent: Friday, July 21, 2023 4:54 PM
>> To: Li, Meng <Meng.Li@xxxxxxxxxxxxx>; dinguyen@xxxxxxxxxx;
>> robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
>> devicetree@xxxxxxxxxxxxxxx
>> Cc: linux-kernel@xxxxxxxxxxxxxxx
>> Subject: Re: [v2 PATCH] arm64: dts: stratix10: add new compatible for Intel
>> SoCFPGA Stratix10 platform
>>
>> CAUTION: This email comes from a non Wind River email account!
>> Do not click links or open attachments unless you recognize the sender and
>> know the content is safe.
>>
>> On 21/07/2023 10:51, Krzysztof Kozlowski wrote:
>>> On 21/07/2023 10:38, Meng Li wrote:
>>>> Intel Stratix10 is very the same with Agilex platform, the DWC2 IP on
>>>> the Stratix platform also does not support clock-gating. The commit
>>>> 3d8d3504d233("usb: dwc2: Add platform specific data for Intel's
>>>> Agilex") had fixed this issue. So, add the essential compatible to
>>>> also use the specific data on Stratix10 platform.
>>>>
>>>> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>>>
>>> From where did you get it?
>>>
>>> Did you just fake a tag to pass the review?
>>
>> I just double checked my replies and this for sure never happened.
>>
>> NAK, don't fake reviews. This very impolite and destroys entire trust.
>> The model of upstream collaboration depends on the trust, which is now gone
>> for Windriver.
>>
> 
> No! I don't fake a tag. 

Really? Then I ask second time - from where did you get it? Provide a link.

Best regards,
Krzysztof