The drive not responding or being stupid. Its basically the system deciding
that whatever is at the other end of the cable has got confused and beating
it about the head then going from the start again.
> from the disk. Will the process be temporarily blocked while until
> it gets cpu to access I/O which could cause a timeout via the ide
> driver and have the bus reset?
It should never manage to do so.
> 2) Would it be possible to get a debug version of the code so that we
> can find out where/what/when the ide bus gets reset.
That is one for Andre I suspect
> Both systems are using Ultra 66 disk drives (could this be a problem)?
> Don Holmgren also has Ultra 66 drives but has not seen this problem.
> In fact, a lot of people haven't seen this problem.
Marginal cabling should normally produce just CRC errors rather than resets.
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