Re: page coloruing tutorial questions [Re: Page coloring HOWTO [ans]]

Larry McVoy (lm@bitmover.com)
Sun, 31 Jan 1999 11:12:02 -0800


: > I assume you mean those programmes which are slowed down by page
: > colouring have a silly access pattern which results in cache line
: > aliasing? They only ran faster without page colouring because random
:
: What does it mean "cache line aliasing"?

I'm not sure that is the correct terminology, but what we were talking
it is this: If you have P physical pages and a cache size of C pages,
and the cache is direct mapped, then you can potentially have P /
C pages trying to be in the cache at the same time.

: And what does it mean that a page is coloured or not?

Page coloring is just a weird way of saying pageno % C. Suppose I had
a very small cache, 8KB with 4KB pages. Then I would have two "colors",
call 'em black and white. The black pages are those pages that satisfy
pageno % 2 == 0; the white pages are pageno % 2 == 1.

For wahtever reason, when people were dreaming this stuff up, it was
too complicated to say pageno % cachesize. But that's all a color is.

: What is the point of page colouring? Do you want to avoid TLB misses or is
: only a L1/L2 cache issue? (or both?)

All you are doing is trying to evenly spread out the process' pages
through the L2 cache - L1 caches are typically set associate so they
don't have this problem, or have it to a much lesser extent. The whole
problem is that a page can only be in one place in the cache and if you
randomly allocate pages when you build up objects, you'll get random
likelihood that you are working on two (virtual) pages in your process
that happen to be in the same location in the cache so they hammer each
other.

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