Re: MTRR patch causes system lockups

David Wragg (dpw@doc.ic.ac.uk)
Sun, 18 Jan 1998 17:38:51 GMT


Emil Briggs writes:
> >
> >Here's a kernel patch that should fix the problem (for 2.1.75 onwards)
> >
> >Putting PCI-related code in with MTRR code is a little ugly, so I've
> >put the fix in drivers/pci/quirks.c instead (it is a PCI quirk, after
> >all).
> >
>
> You're right -- it belongs in quirks. It might be a good idea to
> add a line to the configure help for CONFIG_MTRR -- let people
> know that if they have a 440FX chipset and they set CONFIG_MTTR
> to yes that they also need to make sure passive release is enabled.

When I do something with CONFIG_PCI_OPTIMZE, I'll fix up the
documentation entries.

>
> >You'll need to say yes to CONFIG_PCI_OPTIMIZE.
> >
> >(CONFIG_PCI_OPTIMIZE is really a misnomer in 2.1.75 onwards. What do
> >people think of CONFIG_PCI_QUIRKS, or having a CONFIG option for each
> >quirk?).
> >
>
> Definitely if there's a lot of quirks to take care of.
> So far it looks like this is the first one besides the bridge
> optimizations.
>

Definitely for which? I'm in favour of just the one CONFIG_PCI_QUIRKS
at the moment. If the number of quirks was to grow in the future, then
individual options could be added when (or if) it became necessary.

(The number of quirks would have to grow hugely to make a significant
difference to the size of the on-disk kernel. Since the code is in
__initfuncs, it doesn't affect a running kernel.)

> >Please let me know whether it does the trick.
> >
>
> Works fine on 2.1.78. Not sure how many bios's have this problem.
> I checked two SuperMicro motherboards (a P6SNE and a P6DNE with
> AMI bios) and both of them failed to set the passive release
> bit correctly.

Good.

I have an Intel Venus MB, with the relevant PCI chipset, and an AMI
BIOS, and I don't have the problem. I got the machine around october
'96, so presumably AMI had sorted it out by then.

--
Dave Wragg