Re: [PATCH 09/13] ASoC: ti: davinci-i2s: Enable unexpected frame pulses detection

From: Mark Brown
Date: Fri Mar 15 2024 - 10:55:02 EST


On Fri, Mar 15, 2024 at 03:45:24PM +0100, Bastien Curutchet wrote:
> On 3/15/24 15:09, Mark Brown wrote:
> > On Fri, Mar 15, 2024 at 12:27:41PM +0100, Bastien Curutchet wrote:

> > > McBSP can generate an SYNCERR when unexpected frame pulses are
> > > detected. The driver always disables this feature and ignore the
> > > unexpected frame pulses.

> > What does "unexpected" mean?

> Unexpected frame sync pulse is defined in datasheet as a sync pulse that
> occurs <N> bit clocks earlier than the last transmitted bit of the previous
> frame. The <N> can be configured through registers.

> > > Enable the generation of SYNCERR by the McBSP according to the
> > > 'ti,enable-sync-err' device-tree property.

> > Why would this be optional, and how is this reported - I'm not seeing
> > any interrupt handling updates?

> It is possible to deliberately ignore them and that is what is done today in
> the driver.
> This is reported as a status bit in a register. An interrupt can indeed be
> generated from this but I'm not using it (now at least).
> I use the fact that McBSP automatically drops previous element and starts a
> new reception when an unexpected frame pulse occurs.

That sounds like a very standard behaviour for incorrect clocking. I
don't think this needs configuration at all, just enable this mode.

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