Re: [PATCH v2 3/3] arm64: dts: qcom: apq8016: Add Schneider HMIBSC board DTS

From: Konrad Dybcio
Date: Thu Mar 14 2024 - 05:18:49 EST




On 3/14/24 10:04, Sumit Garg wrote:
Hi Konrad,

On Wed, 13 Mar 2024 at 18:34, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:



On 3/13/24 13:30, Sumit Garg wrote:
Add Schneider Electric HMIBSC board DTS. The HMIBSC board is an IIoT Edge
Box Core board based on the Qualcomm APQ8016E SoC.

Support for Schneider Electric HMIBSC. Features:
- Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306)
- 1GiB RAM
- 8GiB eMMC, SD slot
- WiFi and Bluetooth
- 2x Host, 1x Device USB port
- HDMI
- Discrete TPM2 chip over SPI
- USB ethernet adaptors (soldered)

Co-developed-by: Jagdish Gediya <jagdish.gediya@xxxxxxxxxx>
Signed-off-by: Jagdish Gediya <jagdish.gediya@xxxxxxxxxx>
Signed-off-by: Sumit Garg <sumit.garg@xxxxxxxxxx>
---

[...]

+ memory@80000000 {
+ reg = <0 0x80000000 0 0x40000000>;
+ };

I'm not sure the entirety of DRAM is accessible..

This override should be unnecessary, as bootloaders generally update
the size field anyway.

On this board, U-Boot is used as the first stage bootloader (replacing
Little Kernel (LK), thanks to Stephan's work). And U-Boot consumes
memory range from DT as Linux does but doesn't require any memory to
be reserved for U-Boot itself. So apart from reserved memory nodes
explicitly described in DT all the other DRAM regions are accessible.

Still, u-boot has code to fetch the size dynamically, no?

[...]


+
+ compatible = "adi,adv7533";
+ reg = <0x39>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <31 IRQ_TYPE_EDGE_FALLING>;

interrupts-extended


Please see Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml.

Okay, and what am I supposed to see there?

Konrad