Re: [PATCH v11 char-misc-next 1/2] misc: microchip: pci1xxxx: Add support to read and write into PCI1XXXX OTP via NVMEM sysfs

From: Michael Walle
Date: Mon May 08 2023 - 02:39:56 EST


Am 2023-04-29 14:02, schrieb Vaibhaav Ram T.L:
From: Kumaravel Thiagarajan <kumaravel.thiagarajan@xxxxxxxxxxxxx>

Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer,
industrial, and automotive applications. This switch integrates OTP
and EEPROM to enable customization of the part in the field. This
patch adds support to read and write into PCI1XXXX OTP via NVMEM sysfs.

Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@xxxxxxxxxxxxx>
Co-developed-by: Tharun Kumar P <tharunkumar.pasumarthi@xxxxxxxxxxxxx>
Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@xxxxxxxxxxxxx>
Co-developed-by: Vaibhaav Ram T.L <vaibhaavram.tl@xxxxxxxxxxxxx>
Signed-off-by: Vaibhaav Ram T.L <vaibhaavram.tl@xxxxxxxxxxxxx>

I just had a quick look for obvious errors, couldn't spot any. It's
not a extensive review, though.

-michael