Re: [PATCH v3 03/46] perf stat: Introduce skippable evsels

From: Ian Rogers
Date: Mon May 01 2023 - 16:50:04 EST


On Mon, May 1, 2023 at 1:25 PM Liang, Kan <kan.liang@xxxxxxxxxxxxxxx> wrote:
>
>
>
> On 2023-05-01 11:29 a.m., Ian Rogers wrote:
> > The events are displayed twice as there are 2 groups of events. This
> > is changed by:
> > https://lore.kernel.org/lkml/20230429053506.1962559-5-irogers@xxxxxxxxxx/
> > where the events are no longer grouped.
>
> The trick seems don't work on a hybrid machine. I still got the
> duplicate Topdown events on e-core.

For hybrid the rest of the patch series is necessary, ie the patches
beyond what's for 6.4, which I take from the output (ie not a crash)
you are looking at. As multiple groups are in play then it looks like
the atom events are on >1 PMU which can happen as the x86 code special
cases events with topdown in their name. Some fixes in the series for
this are:
https://lore.kernel.org/lkml/20230429053506.1962559-6-irogers@xxxxxxxxxx/
https://lore.kernel.org/lkml/20230429053506.1962559-40-irogers@xxxxxxxxxx/
and related:
https://lore.kernel.org/lkml/20230429053506.1962559-19-irogers@xxxxxxxxxx/
and so fixing this requires some detective work.

I don't think it should be a requirement for the series that all
hybrid bugs are fixed - especially given the complaints against the
length of the series as-is.

Thanks,
Ian

> 38,841.16 msec cpu-clock # 32.009 CPUs
> utilized
> 256 context-switches # 6.591 /sec
> 33 cpu-migrations # 0.850 /sec
> 84 page-faults # 2.163 /sec
> 21,910,584 cpu_core/cycles/ # 564.107 K/sec
> 248,153,249 cpu_atom/cycles/ # 6.389
> M/sec (53.85%)
> 27,463,908 cpu_core/instructions/ # 707.083 K/sec
> 118,661,014 cpu_atom/instructions/ # 3.055
> M/sec (63.06%)
> 4,652,941 cpu_core/branches/ # 119.794 K/sec
> 20,173,082 cpu_atom/branches/ # 519.374
> K/sec (63.18%)
> 72,727 cpu_core/branch-misses/ # 1.872 K/sec
> 1,143,187 cpu_atom/branch-misses/ # 29.432
> K/sec (63.51%)
> 125,630,586 cpu_core/TOPDOWN.SLOTS/ # nan %
> tma_backend_bound
> # nan % tma_retiring
> # 0.0 %
> tma_bad_speculation
> # nan %
> tma_frontend_bound
> 30,254,701 cpu_core/topdown-retiring/
> 149,075,726 cpu_atom/TOPDOWN_RETIRING.ALL/ # 3.838 M/sec
> # 14.8 %
> tma_bad_speculation (63.82%)
> <not supported> cpu_core/topdown-bad-spec/
> 523,614,383 cpu_atom/TOPDOWN_FE_BOUND.ALL/ # 13.481 M/sec
> # 42.0 %
> tma_frontend_bound (64.15%)
> 385,502,477 cpu_atom/TOPDOWN_BE_BOUND.ALL/ # 9.925 M/sec
> # 30.9 %
> tma_backend_bound
> # 30.9 %
> tma_backend_bound_aux (64.39%)
> 249,534,488 cpu_atom/CPU_CLK_UNHALTED.CORE/ # 6.424 M/sec
> # 12.2 %
> tma_retiring (64.18%)
> 151,729,465 cpu_atom/TOPDOWN_RETIRING.ALL/ # 3.906
> M/sec (54.67%)
> 530,621,769 cpu_atom/TOPDOWN_FE_BOUND.ALL/ # 13.661
> M/sec (54.30%)
> <not supported> cpu_core/topdown-fe-bound/
> 383,694,745 cpu_atom/TOPDOWN_BE_BOUND.ALL/ # 9.879
> M/sec (53.96%)
> <not supported> cpu_core/topdown-be-bound/
> 105,850 cpu_core/INT_MISC.UOP_DROPPING/ # 2.725 K/sec
>
> 1.213449538 seconds time elapsed
>
> Thanks,
> Kan