Re: [PATCH v2 12/12] ARM: dts: exynos: Add Samsung Galaxy Tab 3 8.0 boards

[Artur Weber]

Hi,

On 19/04/2023 22:23, Henrik Grimler wrote:
>> +	memory@40000000 {
>> +		device_type = "memory";
>> +
>> +		/* Technically 2GB, but last 1GB is flaky, so we ignore it for now */
>> +		reg = <0x40000000 0x3FC00000>;
> 
> Comment says 1GB but you are skipping 1GB+4MB.  Is the entire region
> flaky or perhaps just the 4MB region in the middle?

I copied the memory bank configuration from downstream: according to
boot logs and ATAG data from the stock bootloader, there are two memory
regions: one starting at 0x40000000 (size: 1020M) and one starting at
0x80000000 (size: 1024M). Here, only the first bank is added, since the
second one doesn't work.

I tried changing the size of this first bank to the full 1024M, and it
seems to be booting fine; still, I'd rather leave this at the same size
as claimed by downstream and ATAG.

The second memory bank (anything past 0x80000000) doesn't work, as
downstream has some weird special behavior regarding it: that region
contains "page holes", and there's a check that discards every second
page frame in that region[1][2]. That also means my comment is incorrect
- indeed, 2GB of memory are passed to the kernel, but the second 1GB is
effectively halved, leaving us with 1.5GB. (That's an oversight on my
part - I wasn't aware of this when writing the DTS initially, and only
checked this more in-depth now.)

I'm not sure if there's a way to re-create this behavior in mainline;
the closest thing I can think of is making a separate entry in reg for
each of the working pages, but that would leave us with hundreds of
lines, which is not ideal... so it's much easier to just leave it unused
for now.

Best regards
Artur Weber

[1]
https://github.com/gr8nole/android_kernel_samsung_smdk4x12/blob/786b1473b93aabf40c18a2dca035503cce5ecac7/arch/arm/mm/init.c#L413-L414
[2]
https://github.com/gr8nole/android_kernel_samsung_smdk4x12/blob/786b1473b93aabf40c18a2dca035503cce5ecac7/arch/arm/mach-exynos/include/mach/memory.h#L30-L38