On 12/31/21 8:28 AM, Zeng Guang wrote:Right, need check ops validness to avoid ruining AMD system. Same consideration on ops "update_ipiv_pid_table" in patch8.
In xAPIC mode, guest is allowed to modify APIC ID at runtime.Won't this blow up on AMD since there is no corresponding SVM op?
If IPI virtualization is enabled, corresponding entry in
PID-pointer table need change accordingly.
Signed-off-by: Zeng Guang <guang.zeng@xxxxxxxxx>
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/lapic.c | 7 +++++--
arch/x86/kvm/vmx/vmx.c | 12 ++++++++++++
3 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 2164b9f4c7b0..753bf2a7cebc 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1493,6 +1493,7 @@ struct kvm_x86_ops {
int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
+ void (*update_ipiv_pid_entry)(struct kvm_vcpu *vcpu, u8 old_id, u8 new_id);
};
struct kvm_x86_nested_ops {
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 3ce7142ba00e..83c2c7594bcd 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2007,9 +2007,12 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
switch (reg) {
case APIC_ID: /* Local APIC ID */
- if (!apic_x2apic_mode(apic))
+ if (!apic_x2apic_mode(apic)) {
+ u8 old_id = kvm_lapic_get_reg(apic, APIC_ID) >> 24;
+
kvm_apic_set_xapic_id(apic, val >> 24);
- else
+ kvm_x86_ops.update_ipiv_pid_entry(apic->vcpu, old_id, val >> 24);
Thanks,
Tom
+ } else
ret = 1;
break;