[PATCH] tools build: replace $(CC) -E with $(CPP) for pre-processing

[Masahiro Yamada]

The top-level Makefile defines:

  CPP             = $(CC) -E

So, $(CC) -E can be replaced with $(CPP) and this makes more sense
for pre-processing.

Signed-off-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>
---

 tools/build/Makefile.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/build/Makefile.build b/tools/build/Makefile.build
index 99c0ccd..4a0ec5c 100644
--- a/tools/build/Makefile.build
+++ b/tools/build/Makefile.build
@@ -65,7 +65,7 @@ quiet_cmd_cxx_o_c = CXX      $@
       cmd_cxx_o_c = $(CXX) $(cxx_flags) -c -o $@ $<
 
 quiet_cmd_cpp_i_c = CPP      $@
-      cmd_cpp_i_c = $(CC) $(c_flags) -E -o $@ $<
+      cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
 
 quiet_cmd_cc_s_c = AS       $@
       cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<
-- 
2.7.4