Re: [PATCH] perf, x86: catch spurious interrupts after disablingcounters

From: Peter Zijlstra
Date: Thu Sep 16 2010 - 13:35:22 EST


On Wed, 2010-09-15 at 18:20 +0200, Robert Richter wrote:
> Some cpus still deliver spurious interrupts after disabling a counter.
> This caused 'undelivered NMI' messages. This patch fixes this.
>
I tried the below and that also seems to work.. So yeah, looks like
we're getting late NMIs.

---
arch/x86/kernel/cpu/perf_event.c | 21 ++++++++++++++++++++-
1 files changed, 20 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 0fb1705..9a261ac 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1145,6 +1145,22 @@ static void x86_pmu_del(struct perf_event *event, int flags)
perf_event_update_userpage(event);
}

+static int fixup_overflow(int idx)
+{
+ u64 val;
+
+ rdmsrl(x86_pmu.perfctr + idx, val);
+ if (!(val & (1ULL << (x86_pmu.cntval_bits - 1)))) {
+ val = (u64)(-x86_pmu.max_period);
+ val &= x86_pmu.cntval_mask;
+ wrmsrl(x86_pmu.perfctr + idx, val);
+
+ return 1;
+ }
+
+ return 0;
+}
+
static int x86_pmu_handle_irq(struct pt_regs *regs)
{
struct perf_sample_data data;
@@ -1159,8 +1175,11 @@ static int x86_pmu_handle_irq(struct pt_regs *regs)
cpuc = &__get_cpu_var(cpu_hw_events);

for (idx = 0; idx < x86_pmu.num_counters; idx++) {
- if (!test_bit(idx, cpuc->active_mask))
+ if (!test_bit(idx, cpuc->active_mask)) {
+ if (fixup_overflow(idx))
+ handled++;
continue;
+ }

event = cpuc->events[idx];
hwc = &event->hw;

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