Re: 2.6.6-mm5

[Andi Kleen]

ebiederm@xxxxxxxxxxxx (Eric W. Biederman) writes:

> Currently I know of a safe version that will work on x86 on processors
> with sse support.   And I how to generate 64bit I/O cycles with using
> mmx or x87 registers,  but don't know if I can write code that touches
> the FPU registers that is interrupt safe.

As long as you save/restore cr0 and the FPU registers and do clts
interrupts are not a problem.  In fact interrupts are even easier that
process context, where you need preempt_disable().

-Andi

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