Re: PCI cache line messages 2.4/2.5

From: David S. Miller (
Date: Thu Jun 05 2003 - 06:25:37 EST

   From: Alan Cox <>
   Date: 05 Jun 2003 12:20:12 +0100
   And then there is hotplug
My understanding is that the bioses do the cacheline, irq,
etc. assignment via BIOS callbacks done by the PCI controller hotplug

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