Re: PCI cache line messages 2.4/2.5

From: Alan Cox (
Date: Thu Jun 05 2003 - 06:20:12 EST

On Iau, 2003-06-05 at 12:05, David S. Miller wrote:
> I don't know how PnP OS plays into it, but the last time I dug into this
> deep dark area, the BIOS was expected to setup the cache line size for
> all PCI devices in the system.

With a non PnP OS the BIOS is supposed to have done a lot of the setup
for things like IRQ routing. With a PnP OS (and nowdays thats often not
even a selectable but a wired in property) the OS has to do a lot of
the work.

And then there is hotplug

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