> If someone has a minute or so, can someone briefly explain the
> difference(s) between PSE and PAE?
Here's my (probably simple minded) understanding. With the PSE bit turned on
in one of the x86 control registers (cr3?), page sizes are 4MB instead of the
usual 4KB. One advantage of large pages is that there are fewer page tables
and struct page's to store.
PAE is turned on by setting a different bit. It allows for the possibility up
to 64GB of physical ram on i686. Actual addresses are still just 32 bits,
however, so any given process is limited to 4GB (actually Linux puts a limit
of 3GB). But by using a 3 level paging scheme it's possible to map process
A's 32 bit address space to a different region of physical ram than process
B's which, in turn, is mapped to a different physical region than process C,
As far as I know, it's possible to set both bits simultaneously.
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This archive was generated by hypermail 2b29 : Mon Jan 07 2002 - 21:00:32 EST