Re: [Lse-tech] Re: RFC: patch to allow lock-free traversal of lists with insertion

From: Davide Libenzi (
Date: Fri Oct 12 2001 - 21:31:42 EST

On Fri, 12 Oct 2001, Linus Torvalds wrote:

> On Fri, 12 Oct 2001, Davide Libenzi wrote:
> >
> > The problem is that even if cpu1 schedule the load of p before the
> > load of *p and cpu2 does a = 1; wmb(); p = &a; , it could happen that
> > even if from cpu2 the invalidation stream exit in order, cpu1 could see
> > the value of p before the value of *p due a reordering done by the
> > cache controller delivering the stream to cpu1.
> Umm - if that happens, your cache controller isn't honouring the wmb(),
> and you have problems quite regardless of any load ordering on _any_ CPU.
> Ehh?

I'm searching the hp-parisc doc about it but it seems that even Paul
McKenney pointed out this.
Suppose that p and *p are on two different cache partitions and the
invalidation order that comes from the wmb() cpu is 1) *p 2) p
Suppose that the partition when *p lies is damn busy and the one where
p lies is free.
The reader cpu could pickup the value of p before the value of *p by
reading the old value of a
The barrier on the reader side should establish a checkpoint that enforce
the commit of *p before p

- Davide

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