Steven,
One question:
Do you have MTRR enabled?
If so, a temporary workaround is to re-compile the kernel with
it disabled.
This is getting to be something of an epidemic.
As I said, AMD's docs state that the write-combining was
altered in the model and stepping stated. However, I would not
consider myself *nearly* experienced enough in x86 assembler to start
playing around with trying to work up a patch.
Victor
-- Victor J. Orlikowski ====================== v.j.orlikowski@gte.net vjo@raleigh.ibm.com vjo@us.ibm.com- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Fri Dec 15 2000 - 21:00:18 EST