Philip Blundell wrote:
>
> >I never got a satisfactory answer about whether you need a h/w lock, or
> >whether the low-level bus serializes transactions correctly on SMP...
>
> What sort of serialising are you thinking of? Single bus operations are
> atomic, so you don't need a lock purely because (say) both CPUs might want to
> write the same register at the same moment.
Cool, that's what I was interested in.. That was my guess because any
other way seemed less than sane, but I wasn't sure whether h/w vendors
would adopt a vague interpretation of the rules, as PC h/w vendors are
known to do every now and then :) Thus most of my code up until now has
err'd on the side of caution, adopting a "big driver h/w lock" to
serialize all access to hardware.
Since a lot of drivers I've seen adopt a sledgehammer approach to
serialization, I wouldn't be surprised if a lot of drivers could be made
faster on both SMP and UP by careful tuning of spinlocks and use of
atomic variables.
> But there are few guarantees
> beyond that; if you are doing read-modify-write, or more complex transactions,
> you probably do need your own locks.
Another question -- is there a reasonably-portable way to do
read-modify-write PCI op in Linux kernel drivers? What little RMW code
I've seen is horribly x86-specific.
Regards,
Jeff
-- Jeff Garzik | Liberty is always dangerous, but Building 1024 | it is the safest thing we have. MandrakeSoft, Inc. | -- Harry Emerson Fosdick- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Mon May 15 2000 - 21:00:24 EST