> address of my hardware and then I can read or write the contents of the
> desired address from the base address plus 1.
> (could somebody tell me the name of this sort of memory addressing?)
It generally gets called 'indirect' 'indexed' or more commonly 'stupid'.
> The problem begins at interrupt time. The lowlevel hardware access is so
> slow that I "loose" the next interrupt and message (no hardware buffer).
> I have to read several successive bytes wich means several low-level
> operations. Normally one would use insb.
Is this card PCI or ISA. If it is ISA then it is up to the IRQ handler to
check if it has emptied all the irq causing events. PCI is a bit more
forgiving that way but instead hangs the box if you dont clear everything
eventually.
You also obviously need to check your lock the accesses if both the irq
and other code use the index/data pairs.
ALan
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/
This archive was generated by hypermail 2b29 : Mon May 15 2000 - 21:00:22 EST