Hello,
Information:
- Stock Linux kernel 2.2.14 (from ftp.kernel.org) -- tried 2.3.99pre3 as
well
- VA Linux StartX MP workstation:
- Single P-III 450MHz
- Tyan S1832DL Tiger 100 motherboard (SMP-capable)
- 128MB RAM
- Intel i440BX chipset
- Cyclom-8YoP (PCI Bridge: PLX9050)
Problem:
One of the MMIO areas cannot be accessed at all (Base Address 0, provides
access to the PCI Bridge local config registers), depending on the BIOS
address assignment for that area. Any read access to this MMIO area (after
an ioremap(), of course) returns '0', and write accesses do not work.
The given PCI address that fails is 0xfed7ff80.
HOWEVER, if I put another board in the system just to force the BIOS to
allocate a _different_ address to this area, then it works!! The address
that works is 0xfe7dff00 (which is _not_ page-aligned either, but at least
it doesn't have base address bits in the first byte ... whatever that
menas ... :).
I can't just leave this additional card in the system in order to fix this
problem ... :)
I guess that the reason for that is that this address area is only 128
bytes wide. Unfortunately, I can't change this parameter (this size is
hardcoded in the PLX chip).
The access to this MMIO area is done basically as follows:
cy_pci_phys0 = pdev->base_address[0];
cy_pci_phys0 &= PCI_BASE_ADDRESS_MEM_MASK;
cy_pci_addr0 = (ulong)ioremap(cy_pci_phys0, 0x80);
/* Now, if I do ... */
foo = cy_readb(cy_pci_addr0 + some_offset);
/* I _always_ get foo == 0, even in cases I _know for sure_ it's
not 0 */
I've already tried to increase the requested size in ioremap(), but as
that doesn't change the original PCI start address, it doesn't make any
difference.
I've also tried to move the card to different PCI slots, but it always
gets the same PCI address assigned to this MMIO area.
So ... do you guys have any hints as to what could be causing this
problem??
Thanks in advance for your help.
Regards,
Ivan
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This archive was generated by hypermail 2b29 : Sat Apr 15 2000 - 21:00:17 EST