> Note that historically atomic locks have been EXPENSIVE. I think that was
> true on MIPS too, even with the load-locked thing, just because with the
> weak cache coherency the thing was initially done on the _bus_, not inside
> the CPU. But happily that time is long gone, and it's not coming back.
ll/sc instructions on MIPS are as expensive as normal loads / stores.
(The pre-ll/sc thing SGI used in their R3000 based SMPs was horribly
expensive, special purpose hardware that was of course different from other
MIPS vendors' solutions and apparently at times needed *miliseconds* to do
an atomic operation old SGIers told me ...)
Ralf
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