> >>>>> "Gerard" == Gerard Roudier <groudier@club-internet.fr> writes:
>
> Gerard> It seems that some implementation of this interface only
> Gerard> enforces a barrier after the IO/MMIO. If I am right, that
> Gerard> means that if we want, for example, a STORE to memory followed
> Gerard> by a writeX to be observed in that order by a PCI device, we
> Gerard> must insert an explicit barrier between the STORE to memory
> Gerard> and the writeX, for architectures that implements some weak
> Gerard> ordering. By the way, this is often the case in PCI device
> Gerard> drivers.
>
> [snip]
>
> Gerard> Can somebody elaborate, especially about readX/writeX
> Gerard> implementation for PPC. Thanks.
>
> This was discussed some months ago here and the consensus is that
> readl/writel are supposed to guarantee ordering just as they do on the
> x86. However on the Alpha they didn't use to and this was only updated
> somewhere during 2.3.x, 2.2.x has the old behavior. The PPC macros on
> the other hand does include the ordering.
>
> With the new interface you also have the option of using
> __raw_writel/__raw_readl to get non ordered, native byte order access
> to the PCI shared memory. Which allows you to do optimize the access
> better in case it makes sense for y our device and you know what you
> are doing.
The PPC headers seem to me unclear about CPU STOREs to memory being
carried out from CPU to system BUS prior to the IO/MMIO being performed.
On this example
extern inline void out_le32(volatile unsigned *addr, int val)
{
__asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
"r" (val), "r" (addr));
}
I must be sure that 'stwbrx', in this context, does carry out buffered CPU
STOREs to system bus prior to the IO being issued, in order to assume
IA32-like ordering. You may let me know if this is true. Thanks.
My concern is not to criticize or to change the current writeX/readX
semantic, but to be aware of how they are supposed to deal with ordering.
I am able to add any memory barrier that is needed, if I can figure out
the remaining ordering issues drivers have to be careful about.
By the way, I tried to find the PPC manuals on the Net and didn't find any
pointer to such documentations. If some exists, I am very interested in
knowing of them.
Thanks for your reply,
Gérard.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/