>Whoops, I saw that mentioned but did not implement. Will do that now,
The complete patch should looks like this:
--- 2.2.14pre11/include/asm-i386/softirq.h Fri Nov 26 20:01:33 1999
+++ /tmp/softirq.h Tue Dec 7 16:12:21 1999
@@ -1,6 +1,8 @@
#ifndef __ASM_SOFTIRQ_H
#define __ASM_SOFTIRQ_H
+#define CHECK_IF
+
#include <asm/atomic.h>
#include <asm/hardirq.h>
@@ -30,7 +32,16 @@
static inline void end_bh_atomic(void)
{
+#ifdef CHECK_IF
+ unsigned long flags;
+
+ __save_flags(flags);
+ if (!(flags & (1 << 9)))
+ *(int *)0 = 0;
+#endif
atomic_dec(&global_bh_lock);
+ if (get_active_bhs())
+ do_bottom_half();
}
/* These are for the IRQs testing the lock */
@@ -62,8 +73,17 @@
extern inline void end_bh_atomic(void)
{
+#ifdef CHECK_IF
+ unsigned long flags;
+
+ __save_flags(flags);
+ if (!(flags & (1 << 9)))
+ *(int *)0 = 0;
+#endif
barrier();
local_bh_count[smp_processor_id()]--;
+ if (get_active_bhs())
+ do_bottom_half();
}
/* These are for the irq's testing the lock */
@@ -121,10 +141,17 @@
{
unsigned long flags;
+#ifdef CHECK_IF
+ __save_flags(flags);
+ if (!(flags & (1 << 9)))
+ *(int *)0 = 0;
+#endif
spin_lock_irqsave(&i386_bh_lock, flags);
if (atomic_dec_and_test(&bh_mask_count[nr]))
bh_mask |= 1 << nr;
spin_unlock_irqrestore(&i386_bh_lock, flags);
+ if (get_active_bhs())
+ do_bottom_half();
}
#endif /* __ASM_SOFTIRQ_H */
Andrea
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