Re: DMA and Cache coherency on machines without hardware enforced cache coherency.

Ralf Baechle (ralf@uni-koblenz.de)
Tue, 7 Dec 1999 10:12:42 -0200


On Wed, Dec 01, 1999 at 09:21:38AM -0500, Ralph Blach wrote:

> I have to write a device driver for a machine which does not have
> hardware enforced
> cache coherency between bus master devices and the CPU caches. Is there
> a way to allocate certain buffers in uncached memory. I know this
> would lower performance, but it would also solve certain problems which
> seem to be cropping up.

Caches also have the side effects of gathering multiple consecutive accesses
into bursts, thus accelerating memory access. As a consequence of this
effects actually doing all the cacheflush things necessary may end up
being faster. The exact access pattern and hardware platform play will
make a big difference here.

Ralf

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