The 21143 has interrupt mitigation, so it doesn't use this
mechanism, since the chip does much the same thing internally.
I'm using this patch against .91g:
@@ -365,6 +365,7 @@
HAS_PWRDWN=0x10, MC_HASH_ONLY=0x20, /* Hash-only multicast filter. */
HAS_PNICNWAY=0x80, HAS_NWAY143=0x40, /* Uses internal NWay xcvr. */
HAS_8023X=0x100,
+ HAS_INTR_MITIGATION=0x200,
};
static struct tulip_chip_table {
char *chip_name;
@@ -378,7 +379,7 @@
{ "Digital DS21140 Tulip", 128, 0x0001ebef,
HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM, tulip_timer },
{ "Digital DS21143 Tulip", 128, 0x0801fbff,
- HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_PWRDWN | HAS_NWAY143,
+ HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII | HAS_PWRDWN | HAS_NWAY143
| HAS_INTR_MITIGATION,
t21142_timer },
{ "Lite-On 82c168 PNIC", 256, 0x0001ebef,
HAS_MII | HAS_PNICNWAY, pnic_timer },
@@ -2752,9 +2753,13 @@
"csr5=0x%8.8x.\n", dev->name, csr5);
/* Acknowledge all interrupt sources. */
outl(0x8001ffff, ioaddr + CSR5);
- /* Clear all interrupting sources, set timer to
re-enable. */
- outl(((~csr5) & 0x0001ebef) | 0x0800, ioaddr + CSR7);
- outl(12, ioaddr + CSR11);
+ if (tp->flags & HAS_INTR_MITIGATION)
+ outl(0x45240000, ioaddr + CSR11);
+ else {
+ /* Clear all interrupting sources, set timer to
re-enable. */
+ outl(((~csr5) & 0x0001ebef) | 0x0800, ioaddr +
CSR7);
+ outl(12, ioaddr + CSR11);
+ }
break;
}
} while (1);
J
-
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