There is a philosophical question here:
"if a store happens and there is nobody to listen, does it make a sound?"
What I'm alluding to is that the Intel memory ordering essentially says
CPU 1: CPU 2
a = 1
b = 2
read b, see 2: we know that a must be 1.
HOWEVER, we have a slightly different situation here:
CPU 1 CPU 2
read b
a = 0
read a, see 0
write b
Note how both CPU's only did ONE write. That one write does not have any
real "order", and really write ordering is not an issue AT ALL.
In physics, this issue is called "causality" rather than "order", and I
don't think the issue has really been clarified.
Basically, everybody agrees on ordering of writes. Intel keeps them in
order.
What I still find to be the weak point of all the arguments both ways is
that I still have NOT seen any real proof that CPU#1 could not see the
"future" write of "b". In short, without a synchronizing instruction I
don't trust causality - even though I trust order.
(There is no question of "order" in the above, as nothing I have so far
seen defines the ordering of reads vs writes, and THAT is the basic
problem above)
Linus
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