> We don't have ll/sc instructions or compare-and-swap on pa-risc.
> I'd really like to be able to do this without disabling interrupts,
> but I don't think there's a way.
Actually there is a neat way for uniprocessor MIPSes to implement this.
The two registers k0 and k1 are reserved for use of the kernel, for example
in interrupt processing. All exception handles will destroy the content
of these registers and set it to a value != NULL which allows to implement
an atomic increment for uniprocessors like:
move k0, zero
1: lw old, addr
sw new, addr
bnez k0, 1b
Dunno if that'd hold for HPPA as well.
Ralf
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