> FYI, i'm working on a patch for 2.3 that adds the NMI oopser (optionally,
> because 1) it doesnt work on all SMP boxes, and 2) it forces the timer irq
> to the BP) to the 2.3 kernel. Looks like one of the most common uses of
> IKD is lockup detection - the rest is mostly used by kernel hackers. I'll
> post it together with some other x86 APIC fixes and irq cleanups soon.
Why wouldn't the NMI oopser work on a given SMP system? And why the
timer has to be delivered to the BP if these NMIs are exploited? I don't
see any reasons but I might be missing something.
Note that even if IRQ0 is not connected to any I/O APIC, the LINT0 line
is usually broadcasted and even if it's not, NMI may be distributed by the
catcher using "all excluding self" IPI. It is theoretically possible that
there exist i82489DX based systems that have the NMI output of local APICs
not connected to the NMI input of CPUs, but have you ever seen or heard of
such a brain-damaged system? It wouldn't be MPS-compliant, anyway.
I might add a modified NMI oopser to my pending APIC patches (I should
make them available tomorrow, BTW -- they are almost ready but I need to
perform some additional tests), if you don't object, that would handle all
legal cases of timer configuration. The current implementation included
in the ikd patch is somewhat simplistic, indeed.
I don't object the oopser to be optional, of course.
-- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
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