CPU1: uses mm1 as "current->mm" and "current->active_mm".
CPU2: run in lazy tlb mode, uses mm1 as active mm.
if CPU1 makes multiple changes to mm1, then only one TLB-IPI is nessary:
after the first IPI, there are no user mode entries in the TLB of CPU2,
so there is no need for further IPI's.
cpu_vm_mask contains all cpu which could have TLB entries for this
"struct mm", lazy tlb threads do not contain such entries after the
first TLB-flush-IPI.
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