Re: Cache incoherencies

Chris Wedgwood (cw@ix.net.nz)
Sat, 28 Aug 1999 11:29:59 +1200

> Or a 27bit Maestro addressable limit, a 28bit limit on another card
> and so on.

and it would be overkill to do something like:

addr = __vmalloc(size,(1<<ADDRLIMIT));

?

-cw

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