Sorry, here the detailed (and corrected) explanation. You need 2 CPUS.
CPU1: acquires the lock "READ" from outside an interrupt. interrupts
remain enabled.
CPU2: disables the local interrupts, and tries to acquire the lock
"WRITE". Since CPU1 owns the lock, it will spin.
CPU1: an interrupt occurs, and the interrupt handler tries to acquire
the lock "READ".
This is legal if you use a "strave writer"-policy, but with your change
it is a dead-lock.
-- Manfred
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