Etherteam 16 is ISA 8390 based card, can use also shared memory, but not
with my CRYNWR dos example-copied ne.c hack.
Card is also known as Nokia Data II, if to read CRYNWR drivers.
It is completely different from Etherteam 16i for which there is currenlty
driver in kernel.
Modified version of course wont work with usual ne cards.
If anyone wants to integrate or needs a driver, here it is:
http://www.ylenurme.ee/~elmer/ne-icl.c
diff on 2.2.10 ne.c is attached, makes your ne.c unusuable for
traditional ne.c cards.
Basically here are ports located bit different and in some places the card
just refuses to answer to talk 8bit ways as old ne code wants.
If maintainer wants to integrate, I can test.
Positive side of the card is that it costs really nothing and yet
makes good average ne clone performance. Plus, there seems to be gas-tube
based overcharge supressor or however it is called properly in english.
I needed about 20 BNC robust NICs and got those free... :)
elmer.
------------------------------------------------------------------------------
109d108
< {"Etherteam16", "Etherteam16 ", {0x00, 0x00, 0x4b}}, /* ICL Etherteam 16 */
118,122c117,118
< #define NE_DATAPORT 0x400 /* NatSemi-defined port window offset. */
< #define NE_RESET 0x402 /* Issue a read to reset, a write to clear. */
< #define ET16_INTF_REQ 0x402 /* interface and interrupt and reset selection */
<
< #define ET16_SOFT_RESET 0x20
--- > #define NE_DATAPORT 0x10 /* NatSemi-defined port window offset. */ > #define NE_RESET 0x1f /* Issue a read to reset, a write to clear. */ 253c249 < unsigned char SA_prom[0x100];--- > unsigned char SA_prom[32]; 260,261d255 < int irqNum = 0; < 310,314c304,305 < // outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); < outb(inb(ioaddr + NE_RESET) | ET16_SOFT_RESET, ioaddr + NE_RESET); < udelay(100000); < outb(inb(ioaddr + NE_RESET) & ~ET16_SOFT_RESET, ioaddr + NE_RESET); <--- > outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); > 329d319 < 337,338c327,328 < {E8390_NODMA+E8390_PAGE0+E8390_START, E8390_CMD}, /* Select page 0*/ < {0x8|ENDCFG_WTS, EN0_DCFG}, /* Set byte-wide (0x48) access. */--- > {E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/ > {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ 348c338 < {0x80, EN0_RSARHI},--- > {0x00, EN0_RSARHI}, 355,356d344 < < 358,362c346,348 < for(i = 0; i < 0x10 /*sizeof(SA_prom)*/; i+=2) { < < SA_prom[i] = 0xff & inw(ioaddr + NE_DATAPORT); < SA_prom[i+1] = 0xff & inw(ioaddr + NE_DATAPORT); < printk("%02x:%02x:",SA_prom[i] ,SA_prom[i+1] );--- > for(i = 0; i < 32 /*sizeof(SA_prom)*/; i+=2) { > SA_prom[i] = inb(ioaddr + NE_DATAPORT); > SA_prom[i+1] = inb(ioaddr + NE_DATAPORT); 376,377d361 < wordlength = 2; < 384c368 < outb_p(ENDCFG_WTS | 0x9, ioaddr + EN0_DCFG);--- > outb_p(0x49, ioaddr + EN0_DCFG); 444,445d427 < printk(" going for autoirq \n"); < 460,478d441 < if (dev->irq == 0) { < irqNum = inb(NE_BASE + ET16_INTF_REQ & 0xf); < if (irqNum == 1 ) dev->irq = 5; < if (irqNum == 2 ) dev->irq = 9; < if (irqNum == 4) dev->irq = 12; < if (irqNum == 8) dev->irq = 15; < }; < < if (dev->irq == 5 || dev->irq==9 || dev->irq == 12 || dev->irq == 15){ < < irqNum = 0; < if (dev->irq == 5) irqNum = 1; < if (dev->irq == 9) irqNum = 2; < if (dev->irq == 12) irqNum = 4; < if (dev->irq == 15) irqNum = 8; < } < if (irqNum){ < outb(irqNum, ioaddr + ET16_INTF_REQ); < }; 565,567d527 < outb(inb(NE_BASE + NE_RESET) | ET16_SOFT_RESET, NE_BASE + NE_RESET); < udelay(100000); < outb(inb(NE_BASE + NE_RESET) & ~ET16_SOFT_RESET, NE_BASE + NE_RESET);
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