1) Why shouldn't hardware engineers make cheap peripherals which
require significant CPU assist and then just have an extra CPU around
to ensure that the user experience is responsive while one CPU is
doing things like the modem or sound processing. It seems to me that a
cheap SMP box would be much more useful than a computer with a whole
bunch of seldom used specialized chips in it. I'd love to have my
kernel compiles double in speed just by shutting down my modem or
sound card.
This brings me to my second question about SMP:
2) Why don't CPU designers revisit the RISC revolution and make much
simpler processors with shallower (simpler) pipelines and then pack
two or four processors on one die creating one chip that would appear
to the kernel as a four processors. Then let you kernel developers
play with locking and the application software developers multithread
their code to take advantage of it. It seems to me like it moves the
problem of speed optimzation into software where it is much easier to
profile and tweak. It could be that many of the fancy tweaks built
into microprocessors today might not be getting used all that often
because of lagging compiler technology or because the designer thought
something was important when in fact it is rarely used in modern
code. How do we know that the Pentium II or III is not just chocked
full of bloat etched into silicon?
> > I would guess that on the DSP modems a good fraction of the 200K
> > is the firmware for the DSP that is uploaded. Doing v.42bis in
> > kernel shouldn't be that complicated nor time critical, and AT
> > emulation is ugly but easy, as proved in drivers/isdn/isdn_tty.c
>
> The 200K figure is a non DSP assisted softmodem doing everything up to
> 56Kbit.
>
> Alan
>
>
> Please read the FAQ at http://www.tux.org/lkml/
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