Re: Kernel 2.2.1 hangs on boot

Piete Brooks (Piete.Brooks@cl.cam.ac.uk)
Fri, 26 Feb 1999 06:48:01 +0000


>> He explained that the calibrate_tsc() subtracted the two register values it
>> gets, and uses that number in the divide.
> Its a bit more complex than that. Intel guarantees that rdtsc wont return
> the same 64bit value (the low bits change fastest) in a 10 year period.

Quite -- so if it returns the *same* value twice, then TSC doesn't work !

>> A pretty effective fix would be to amend the code to say
>> IF the two register readings are the same
>> THEN clear the TSC flag
>> Will this just "cover up" the problem, or is it a "kosher" test ?
> If its a divison by zero - what if its a straight overflow

I'm lost ....

Above you seem to agree that it "cannot" have the same value twice within
10 years. Thus if it does, it means that TSC does not work.
What am I missing ?
[[ I mean "IF the two 64bit register readings are the same" ... ]]

Is there any reason for calibrate_tsc() to have quite so much asm() ?
Couldn't it be pruned to use it just to get the initial value, do the wait,
and capture the second value ? Could the rest not be done in C ?
[ this would make it a lot easier to add the code to disable tsc if the values
were the same, as well as making it more obvious, less error prone etc .,..
]

Also, would it be OK to decode the boot line arguments one line earlier in
init/main.c so that it would be possible to explicitly disable tsc from LILO?

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