> Thank you for your reply.
>
> In message <m0zSlJf-0007U9C@the-village.bc.nu> you write:
> > > So my question is :
> > > * Is there any way to invoke Burst-Read transaction on PCI from CPU
> > > on Linux/i386 kernel 2.0.X ?
> >
I exactly met the same problem a year ago ! we rapidly reverted to
Bus Mastering. A CPU board manufacturer engineer assured me that no
Intel chipset has support for it.
We even had fun with pre-fetchable capability, with no result. It's
strange but reading the PCI spec it seems that target-mode burst
reads could be generated in response to (Level2) cache misses (on
pre-fetchable MEM areas, of course) but I found no way of generating
them.
regards.
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