"The specification states that this read-only register specifies "how
often" the device needs access to the PCI bus (in increments of 1/4 of a
microsecond or 250ns). A value of zero indicates that the device has no
stringent requirement in this area.
"In the author's opinion, this description (i.e., "how often") is a little
unclear. The name of the register MAX_LAT, indicates to the author that
if defines how quickly the master would like to access the bus i.e., its
GNT# asserted by the arbiter) after it asserts its REQ#. If this is the
case, then the value hardwired into this register would be used by the
configuration software to determine the priority level the bus arbitrer
assigns to the master"
In the following, I understand Gerard to have calculated the time that one
device must wait for the other devices to be done with their accesses
prior to the grant of the bus to the third. This is to say that MAX_LAT
specifies the maximum that a device is nominally "able" to wait for a
GNT#. Subject to the comments of Shanley, I think that Gerard uses the
sanest interpretation (unfortunatleym the sanest interpretation is not
necessarily the "correct" interpretation).
On Mon, 28 Sep 1998, Doug Ledford wrote:
> Gerard Roudier wrote:
> > On Sun, 27 Sep 1998, Mike Black wrote:
> > > SCSI Latency: 8 min, 8 max, 64 set, cache line size 08
> > > IDE Latency: 64 set
> > > Network Latency: 8 min, 28 max, 64 set
> >
> > Let me translate this output into PCI language:
> >
> > SCSI:
> > MIN_GNT = 8 --> 8 x 0.25 = 4 micro-seconds
> > MAX_LAT = 8 --> 8 x 0.25 = 4 micro-seconds
> > LATENCY_TIMER = 64 --> 64x0.030 = 1.92 micro-seconds
> >
> > IDE:
> > LATENCY_TIMER = 64 --> 64x0.030 = 1.92 micro-seconds
> >
> > Network:
> > MIN_GNT = 8 --> 8 x 0.25 = 4 micro-seconds
> > MAX_LAT = 28 --> 28x 0.25 = 7 micro-seconds
> > LATENCY_TIMER = 64 --> 64x0.030 = 1.92 micro-seconds
> >
> > If we only take into account these 3 devices, the predictable PCI BUS
> > latency is 2*1.92 = 3.84 micro-seconds that fits the MAX_LAT requirement
> > of the SCSI device that is the lowest value for MAX_LAT.
Agreed, assuming that all devices are posting requests and the arbiter
fufills the requests in a fair manner, the SCSI device will have to wait
at most for two devices to complete a request prior to its request and
that this wait time will be less than the MAX_LAT time "desired" by the
SCSI.
> > My comments:
> >
> > 1 - The system software that chose a latency timer of 64 for all
> > devices has not been able to fit the MAX_GNT value due to the SCSI
> > controller providing it very probably _wrong_ informations, but the
> > MAX_LAT requirement of all devices has been achieved.
We have disagreed on the latency timers proper settings in the past. In
my work with network cards, it is can be better to give the network long
latencies on the bus. The arbitration overhead can get costly if the
latency is too short. I have seen systems with multiple 100bT cards do
badly with a latency timer of 32 but do well with a latency timer of 128.
I have no doubt that this a thing that merits test on a given system.
> > 2 - A device that desires to be granted 4 us for a BUS transaction and
> > that want the maximum BUS latency to be at most that 4 us is kind of
> > shit-maker for PCI BIOSes and PCI drivers that want to make things
> > fine, unless it is required to be the unique device on a PCI BUS.
I agree, it is not a sane requirement from the scsi device.
> > > 00:0b.0 SCSI storage controller: Adaptec AIC-7880U
> >
> > What a great illumination I have had 4 years ago to go with Symbios
> > controllers rather than Adaptec ones. ;-)
The Symbios controllers work well for me, I had nothing but misery with
adaptec stuff. I have nine disk raid on three NCR53c875 cards along with
one BusLogic 545C ISA card (for boot) in this system that I have pounded
for days on end with multiple copies of Bonnie in execution + continuous
kernel builds (8 gig of disk data in flight) with no errors. I was rarely
able to get a single thread of Bonnie to complete very many times when I
was using 2940UW and aha1452. Am I correct that the hostile takeover of
Symbios by Adaptec was nixed by FTC?
> Your interpretation of the PCI spec and what Adaptec thinks these values
> mean in terms of the PCI bus are two different things. One of you is wrong
> about what the MAX_LAT value is all about.
It would not be the first time that the sane interpretation of a Spec was
not the "correct" interpretation. I think that most controllers ought to
have a value of zero. The controller needs to be able to live with large
delays to GNT# without barfing.
My $0.02 only.
Ed Welbon welbon@spaminator.bga.com
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