>
> I see these too although I had not seen this periodic function.
> What are you using to read time? Are you reading the
> 8253? In any case, the 8253/4 access seems like it can take 15us.
> I have indirectly measured a 15us delay between two inb instructions.
> But this was on an older chip set and with ISA device on the bus.
> PCI bus analyzers are needed. I'm hoping to get one in the next month.
>
>
> On Wed, Sep 02, 1998 at 03:27:15AM -0500, Manoj Apte wrote:
> >
> > > > in a handler). I created my own fast handler registered at IRQ32 (
> > > > interrupt is generated by
> > > > the APIC timer on a Ppro 200) that gives me a latency of approx 2300
> > > > nanoseconds
> > >
> > > the APIC timer interrupt is a CPU-internal IRQ, and thus has lower
> > > latencies. It should have identical latencies to a software interrupt.
> > > (like your numbers show). I measured 500 cycles _total_ profiling
> > > interrupt cost. This makes it possible to run 100 thousand IRQs a second
> > > profiling on a 100MHz P5. (i've tried it. It's noticeable but it works)
> > >
> >
> > Agreed.. but my question was about why i see periodic mega-latencies of
> > the order of 15us every 30 seconds or so. I want to track the source of
> > this, so that _if_ i can dsiable that probelm, I have a much more
> > predictable APIC interrupt latency.
> >
> > > _external_ interrupts have much higher latencies. (especially as old
> > > XT-PIC interrupts halt the CPU for a considerable amount of time ... this
> > > is not the case with IO-APIC and inter-CPU interrupts.)
> > >
> > > -- mingo
> > >
> >
> >
> > -
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> --
>
> ---------------------------------
> Victor Yodaiken
> Department of Computer Science
> New Mexico Institute of Mining and Technology
> Socorro NM 87801
> Homepage http://www.cs.nmt.edu/~yodaiken
> PowerPC Linux page http://linuxppc.cs.nmt.edu
> Real-Time Page http://rtlinux.org
>
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