> The TSC in the Cyrix/IBM 6x86MX is _not_ broken, it works just like a
> Pentium TSC when Suspend-on-Halt is not enabled explicitly.
>
> This behaviour is independent of chip revision i.e. ALL Cyrix/IBM 6x86MX
> chip revisions (including the new MII) will stop the TSC when entering a
> Halt state IFF Suspend-on-Halt is enabled explicitly (it is normally
> disabled).
> ....
> BTW I wrote Cyrix about the 6x86MX TSC behaviour and they acknowledged
> this difference between their CPUs and the standard Pentium behaviour.
> Future MII revision will be changed so that the TSC keeps running even
> when the CPU is Halted _and_ Suspend-on-Halt is enabled, at the cost of
> a few extra mW dissipated.
Did anybody think of this possible patch, considering that
do_fast_gettimeoffset should not be called too often:
Disable Suspend-on-Halt when do_fast_gettimeoffset() has been called
for less than few (for instance 20) clock ticks ?
Just an idea, I do not have a Cyrix,
Etienne.
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