> So another kind of atomicity is often provided which is guaranteed
> atomic even against other CPUs contending for the same word using the
> same mechanism. Some CPUs don't provide such a mechanism in hardware so
> it has to be implemented on top of spinlocks or somesuch device.
Or even special purpose hardware that allows atomic operations in absence
of whatever SMP support in the CPU. This was used in certain R3000 based
systems made for example by Mips Computer Systems, Control Data and SGI.
I some idea how such hardware might work but I've never seen an actual
implementation. One idea might be that the ll/sc protocol used by Alpha
or R6000 and above is implemented in a custom chips using per CPU
registers. Whatever, some SGI engineer called the idea of supporting
all existing implementations of that kind of hardware pretty difficult,
if not impossible.
Ralf
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