Re: Asymmetric multiprocessing?

Perry Harrington (
Sun, 3 May 1998 17:46:11 -0700 (PDT)

> In a shared (or semi shared) it would be tough.. You'd have a master
> processor allocate chunks for the other chips.. This would only work if
> they all had decent MMUs I guess... :)

Umm, whatis "Bus mastering". Think about it, right now bus mastering
PCI devices read and write to system RAM autonomously from the system
processor. This has been used for years (old bus master AHA1542?).
This is not conceivably difficult. Granted, having 1, 2, or 4 megs of
"buffer" RAM on each card would be very useful. Infact, imagine a board
that is constructed identical to a Cogent em110 ethernet card: 4 processors,
1 bridge chip, and a 16 megs of onboard RAM...or perhaps a shared DIMM
that has a 4 way MMU attached to it to allow access by all slaves.


Perry Harrington       Linux rules all OSes.    APSoft      ()
email: 			Think Blue. /\

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