>
> something that would pair better and hit the cache cleaner
>
> pxor mm0,mm0
> mov esi, addr ;1
> mov ecx, 256
> mov edi, esi ;2
> L1:
> movq [esi], mm0
> add edi, 8 ;A
> movq [edi], mm0
> add esi, 8 ;B
> dec ecx
> jnz L1 ;C
Thanks for the snippet!
>
> > http://developer.intel.com/drg/mmx/manuals/prm/prm.htm
>
> ftp://download.intel.com/pub/design/ is a good archive, the html links
> live under http://developer.intel/com/design, but its not overly
> intuitive.
>
> the problem with this idea is twofold, the emms is prohibitively
> expensive (so that the gain is negated, at best, useless at worst).
> even if you could manage task/thread based regaining of the fsr in the
> kernel, printk() and other things would want to use fpu code. iow, mmx
> in a kernel essential like bzero/mmap wouldn't fly so hot. not without
> details
The snippet I posted was specifically designed for a bulk page clearing
purpose. I do realize the expense of MMX, with FPU regs and all. In this
case, MMX could make clearing pages trivial. I haven't found an instruction
list with clock tick counts yet. I could just implement this and use rdtsc,
but I don't know if my assembler supports MMX instructions, anyone???
>
> --
> James Gambill
> WebTV Networks
> Service Operations
>
Ooh, I'm sure it's lots of fun trying to sell Microsoft on the idea that MIPS is
really a better integrated solution than a PII running NT ;)
--Perry
-- Perry Harrington Linux rules all OSes. APSoft () email: perry@apsoft.com Think Blue. /\- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu