Re: Pentium Pro MTRR setting module

Emil Briggs (briggs@bucky.physics.ncsu.edu)
Wed, 14 Jan 1998 10:29:56 -0500 (EST)

>Whoa! I've already made such a patch and submitted it to
>Linus. Earlier versions were posted here. My patch is safe for
>non-PPro and non-x86 system, supports SMP and also has an ioctl()
>interface for C programmes as well as the ASCII interface for
>sysadmins. It creates a /proc/mtrr entry. My patch also does better
>checking for overlapped regions and other nasties. It even comes with
>example C code to use the ioctl()s. Patch appended. It's against
>2.1.78.
>

I noticed a few posts from people saying that they didn't see any
performance increase by enabling write combining for the LFB. The same
thing happened to me so I poked around a bit and found mention of an
errata for the 440FX chipset that states that the passive release
enable bit must be set in the PIIX3 (bit 1 at offset 82h) in addition
to enabling USWC write posting. Some bios's/motherboards may not
set this up correctly which would explain why there was no performance
increase. The document describing the errata is available on Intels site

http://www.intel.com/design/pcisets/specupdt/297654.htm

I'm going to look into this and see if I can figure out what's going
on -- should be easy to fix if this is indeed the problem.

Regards
Emil