Re: 8390.c + 2.1 SMP, IO-APIC irq handling anomaly, 2.1.73 patch

Alan Cox (
Fri, 19 Dec 1997 16:51:03 +0000 (GMT)

> code is executed on a non-external-IRQ-accepting CPU
> (currently all IRQs go to CPU#0), it does not seem
> to be guaranteed that the external IO-APIC stops
> emitting interrupts. I have measured the time window, and
> it's around ~9 usecs. As far as i could experiment with

There are message passing delays going on across APICs. Also
those delays are in theory arbitarily long in the presence of
noise. If its CPU synchronization delays we see then a synchronizing
instruction should resolve this ?

> the first solution was to add a 10 usecs delay to
> synchronize_irq(), then i tried to find a wait-less

Not a fix if its the posting delay from an IRQ. There's a related 2.0.x
funny btw when irq's get forwarded across cpu's and they are shared some
boards in some situations go astray.

Maybe someone with a bit of time should bite the bullet and use the apic as
God intended for its distribution and priority lockouts