Re: Triton DMA

Doug Ledford (
Sat, 29 Nov 1997 20:53:24 -0600 (CST)

On 29-Nov-97 Rogier Wolff wrote:
>Stop! I just took a "one bit in a million" as an example. The real
>rate may be 1000 or 1000000 less often, leading to error rates that
>are a little more beleivable.

Of course, the SCSI bus isn't like a memory chip though. The comments made
earlier that errors usually occur in patterns such as the lower 4 bits may
be wrong or some such isn't typically true of the SCSI bus. It doesn't have
memory cells, you have electrical signal transfer which is not susceptible
to the same type of cell group errors. On the other hand, if a cache chip
on the drive goes bad......bad that's true of both IDE and SCSI.

>Incorrectly terminated SCSI busses or too long a SCSI bus lead to
>erratic behaviour. Same (cable too long, or improper termination)
>goes for IDE. (From the 16Mb/sec mode upwards, the motherboard side
>of the cable has to be terminated.)

Of course it leads to erratic behaviour. If you have no termination what so
ever on the SCSI bus, then the Adaptec cards will refuse to operate at all.
The reason is that no termination results in all kinds of open circuit where
they should be closed and grounded. The hardware ends up reading all kinds
of nasty and unintended values from the SCSI bus when there is no
termination. Poor termination is simply a precursor to this complete fail
state :)

E-Mail: Doug Ledford <>
Date: 29-Nov-97
Time: 20:53:25