Re: [PATCH] NMI trap revised (was Re: NMI errors in 2.0.30??)

Martin Mares (
Fri, 9 May 1997 23:24:20 +0200


> So no more NMI memory parity check for PIIX4 ?
> I don't belive it, may be in some other way ... Anyway with your
> per-chipset init code, we can write the right handling of NMI errors,
> reverting to a default behavior if no handling is defined or the chipset
> don't support (or we don't know how to handle) some features.
> So when NMI is raised we will have:
> default handling -> nothing done.
> 0x61/0x70 working OK -> handle memory parity and I/O CH CHK errors
> some strange chipset -> do strange handling

It seems we must make the parity error address detection optional and turned
off by default. Probably the only sure thing there is printing of some general
information based entirely on port 0x61 status (like the NMI routine in current
pre-2.1.37-6). Maybe the rest should be a compile-time switch as most users don't
need it at all. Probably the best solution would be to write a universal
memory tester program doing these checks and much more.

Anyway, the chipset code will probably have a NMI-hook for displaying ECC
error data and PCI exceptions on some chipsets.