pentium 4MB pages question for you MMU hackers

Ingo Molnar (
Fri, 3 Jan 1997 19:33:49 +0100 (MET)

just wondering if ring 3 code could use 4MB pages.

When i have the following page dir entry:

_PAGE_TABLE | _PAGE_4M | 4mb_aligned_phys_addr

Kernel space sees phys_addr correctly, but user space doesnt. Does this
mean that 4MB pages are only for ring0 code? Has anyone experimented with
this one?

[heh, if only for ring0 then one more argument for GGI being in the kernel
.. and one more argument for ring0 processes]

-- mingo

ps. and i got faults when phys_addr wasnt 4mb aligned ... does it really
have to be 4mb aligned?