Re: interrupt counts

Stephen C. Tweedie (
Tue, 20 Aug 1996 11:19:39 +0100


On Mon, 19 Aug 1996 12:11:12 +0300 (EET DST), Matti E Aarnio
<> said:

>> I dont know how much handling 64bit instead of 32 bit decereases
>> performance, but this is definately an option.

> If you look deep down, at 32-bit machines it will take
> twice as much work as native size counter handling does.
> At Alphas I would use 64-bit longs anyway :-)

It's not nearly that bad. The biggest bottleneck is probably memory
speed, not CPU cycles, and we do all memory transfers in units of
cache lines already, not words. We'll still just be doing a
read-modify-write of a single cache line whether the update is for a
single 32-bit word or a 64-bit doubleword. This is assuming you have
got a write-back cache, of course; a 486 with write-through cache will
be a full memory write worse off for the 64-bit counter update.


Stephen Tweedie <>
Department of Computer Science, Edinburgh University, Scotland.