[PATCH v6 17/23] dt-bindings: crypto: meson: remove clk and second interrupt line for GXL

From: Alexey Romanov
Date: Tue Mar 26 2024 - 11:37:12 EST


GXL crypto IP uses DMA engine, which doesn't require clk input
and second interrupt line.

Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node")
Signed-off-by: Alexey Romanov <avromanov@xxxxxxxxxxxxxxxxx>
---
.../bindings/crypto/amlogic,gxl-crypto.yaml | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
index 948e11ebe4ee..d3af7b4d5f39 100644
--- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
@@ -20,20 +20,11 @@ properties:
interrupts:
items:
- description: Interrupt for flow 0
- - description: Interrupt for flow 1
-
- clocks:
- maxItems: 1
-
- clock-names:
- const: blkmv

required:
- compatible
- reg
- interrupts
- - clocks
- - clock-names

additionalProperties: false

@@ -46,7 +37,5 @@ examples:
crypto: crypto-engine@c883e000 {
compatible = "amlogic,gxl-crypto";
reg = <0xc883e000 0x36>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_BLKMV>;
- clock-names = "blkmv";
+ interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
};
--
2.34.1